(1.1) ‘core2’: Intel Core 2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3 instruction set support.

(1.2)‘corei7’: Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 instruction set support.

(1.3)‘corei7-avx’: Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AES and PCLMUL instruction set support.

(1.4)‘core-avx-i’: Intel Core CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AES, PCLMUL, FSGSBASE, RDRND and F16C instruction set support.

(1.5)‘core-avx2’: Intel Core CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA, BMI, BMI2 and F16C instruction set support.

(1.6)‘i386’, Original Intel i386 CPU.

(1.7)‘i486’, Intel i486 CPU. (No scheduling is implemented for this chip.)

(1.8)‘i586’,‘pentium’ Intel Pentium CPU with no MMX support.

(1.9)‘pentium-mmx’, Intel Pentium MMX CPU, based on Pentium core with MMX instruction set support.

(1.10)‘pentiumpro’, Intel Pentium Pro CPU.

(1.11)‘i686’, all i686 family chips.

(1.12) ‘pentium2’, Intel Pentium II CPU, based on Pentium Pro core with MMX instruction set support.

(1.13)‘pentium3’, ‘pentium3m’, Intel Pentium III CPU, based on Pentium Pro core with MMX and SSE instruction set support.

(1.14)‘pentium-m’, Intel Pentium M; low-power version of Intel Pentium III CPU with MMX, SSE and SSE2 instruction set support. Used by Centrino notebooks.

(1.15)‘pentium4’,‘pentium4m’, Intel Pentium 4 CPU with MMX, SSE and SSE2 instruction set support.

(1.16)‘prescott’, Improved version of Intel Pentium 4 CPU with MMX, SSE, SSE2 and SSE3 instruction set support.

(1.17)‘nocona’, Improved version of Intel Pentium 4 CPU with 64-bit extensions, MMX, SSE, SSE2 and SSE3 instruction set support.

(1.18) ‘atom’, Intel Atom CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3 and SSSE3 instruction set support.

(1.19)‘k6’, AMD K6 CPU with MMX instruction set support.

(1.20)‘k6-2’,,‘k6-3’, Improved versions of AMD K6 CPU with MMX and 3DNow! instruction set support.

(1.21)‘athlon’,‘athlon-tbird’, AMD Athlon CPU with MMX, 3dNOW!, enhanced 3DNow! and SSE prefetch instructions support.

(1.22)‘athlon-4’,‘athlon-xp’,‘athlon-mp’, Improved AMD Athlon CPU with MMX, 3DNow!, enhanced 3DNow! and full SSE instruction set support.

(1.23)‘k8’,‘opteron’,‘athlon64’,‘athlon-fx’, Processors based on the AMD K8 core with x86-64 instruction set support, including the AMD Opteron, Athlon 64, and Athlon 64 FX processors. (This supersets MMX, SSE, SSE2, 3DNow!, enhanced 3DNow! and 64-bit instruction set extensions.)

(1.24)‘k8-sse3’,‘opteron-sse3’,‘athlon64-sse3’, Improved versions of AMD K8 cores with SSE3 instruction set support.

(1.25)‘amdfam10’,‘barcelona’, CPUs based on AMD Family 10h cores with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, SSE3, SSE4A, 3DNow!, enhanced 3DNow!, ABM and 64-bit instruction set extensions.)

(1.26)‘bdver1’, CPUs based on AMD Family 15h cores with x86-64 instruction set support. (This supersets FMA4, AVX, XOP, LWP, AES, PCL_MUL, CX16, MMX, SSE, SSE2, SSE3, SSE4A, SSSE3, SSE4.1, SSE4.2, ABM and 64-bit instruction set extensions.)

(1.27)‘bdver2’, AMD Family 15h core based CPUs with x86-64 instruction set support. (This supersets BMI, TBM, F16C, FMA, AVX, XOP, LWP, AES, PCL_MUL, CX16, MMX, SSE, SSE2, SSE3, SSE4A, SSSE3, SSE4.1, SSE4.2, ABM and 64-bit instruction set extensions.)

(1.28)‘bdver3’, AMD Family 15h core based CPUs with x86-64 instruction set support. (This supersets BMI, TBM, F16C, FMA, AVX, XOP, LWP, AES, PCL_MUL, CX16, MMX, SSE, SSE2, SSE3, SSE4A, SSSE3, SSE4.1, SSE4.2, ABM and 64-bit instruction set extensions.

(1.29)‘btver1’, CPUs based on AMD Family 14h cores with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, SSE3, SSSE3, SSE4A, CX16, ABM and 64-bit instruction set extensions.)

(1.30)‘btver2’, CPUs based on AMD Family 16h cores with x86-64 instruction set support. This includes MOVBE, F16C, BMI, AVX, PCL_MUL, AES, SSE4.2, SSE4.1, CX16, ABM, SSE4A, SSSE3, SSE3, SSE2, SSE, MMX and 64-bit instruction set extensions.

(1.31)‘winchip-c6’, IDT WinChip C6 CPU, dealt in same way as i486 with additional MMX instruction set support.

(1.32)‘winchip2’, IDT WinChip 2 CPU, dealt in same way as i486 with additional MMX and 3DNow! instruction set support.

(1.33)‘c3’, VIA C3 CPU with MMX and 3DNow! instruction set support. (No scheduling is implemented for this chip.)

(1.34)‘c3-2’, VIA C3-2 (Nehemiah/C5XL) CPU with MMX and SSE instruction set support. (No scheduling is implemented for this chip.)

(1.35)‘geode’, AMD Geode embedded processor with MMX and 3DNow! instruction set support.





The cpu code table 2 ^info

(2.1) KNM , The Intel® Xeon Phi™ product family processor code name Knights Mill.

(2.2)MIC-AVX512, The Intel® Xeon Phi™ processor x200 product family.

(2.3)CORE-AVX512, The Intel® Xeon® Processor Scalable Family.

(2.4)COMMON-AVX512, Any Intel® processor that supports Intel® AVX-512 instructions.

(2.5)CORE-AVX2,

(2.6)CORE-AVX-I,

(2.7)AVX ,

(2.8)SSE4.2,

(2.9)ATOM_SSE4.2, Intel® Atom™ processors that support Intel® SSE4.2 instructions.

(2.10)SSE4.1,

(2.11)SSSE3,

(2.12)ATOM_SSSE3, Intel® Atom™ processors

(2.13)SSE3,

(2.14)SSE2,

(2.15)IA32,